Abstract: The US Department of Energy has launched an Exascale Computing Project (ECP) to help build exascale machines by 2023. In the past, getting to terascale (10^12 floating point operations per second) and going from terascale to petascale (10^15 FLOPS) has stressed applications, system software and the underlying hardware in often unexpected ways. As we contemplate what an exascale (10^18) machine might look like, we are looking at even more profound changes in architecture and system design (including the fact that measuring FLOPS is not a very helpful metric). In this talk I will be giving a bit of background of the ECP and its goals, and then discuss how power has become a fundamental limitation on how well supercomputers can scale. I will then discuss the details of power management on recent Intel processors and cover recent results on how those architectural design decisions have had impacts on performance and reproducibility in high performance computing.

Short Bio: Dr. Barry Rountree has a BA in Theater Arts and Drama, an MS in System and Network Administration and received his PhD at the University of Arizona in 2010 advised by David Lowenthal. Upon graduating he took a postdoctoral position in the Center for Applied Scientific Computing at Lawrence Livermore National Laboratory and became a staff scientist there in 2013. His research focused on power constrained performance optimization, particularly with regard to runtime systems and job schedulers. He is particularly interested in “bare metal” programming and helped initiate the “Zero-S” project at LLNL to remove the operating system completely and allow applications unmediated access to hardware resources. He is the originator the of msr-safe kernel module and companion libmsr library. He also mentors 6-12 undergrad and PhD students each summer, and is looking for candidates for 2018.